Mixed Swing Techniques for Low Energy/Operation Datapath Circuits

iii The portable communications industry's vision of integrating a complete multimedia complex on a single die, coupled with the desktop computing industry's vision of integrating multimedia functionality into general-purpose microprocessors has transformed lowering the power dissipation of digital signal processing (DSP) datapath circuits into an increasingly important challenge in current and future fabrication processes. Fully-static CMOS logic accompanied with supply voltage scaling has enjoyed widespread usage in lowering datapath power dissipation over the last decade. However , fundamental limitations preclude device threshold voltage scaling under the constant drain-source field scaling paradigm in future deep-submicron processes, imposing limitations on voltage scaling. This has motivated a strong necessity for exploring new methodologies to lower the power dissipation of next-generation high-speed datapath circuits. This thesis investigates Mixed Swing techniques for reducing the power dissipa-tion of static CMOS datapath operators while retaining their high performance, or equivalently lowering their energy consumption per switching operation (energy/oper-ation). Mixed swing techniques employ multiple operating voltages to implement standard datapath primitive functions by intermixing high-and low-voltage signal swings while driving interconnect and gate-fanout load capacitances at reduced volt-Abstract iv R.K. Krishnamurthy age swings. Static and dynamic, single-ended and fully-differential mixed swing approaches are investigated to demonstrate the ability to voltage-scale more aggressively than static CMOS well into the deep-submicron regime. Posynomial formulations for power and delay based on submicron MOS models are derived for mixed swing circuits to study and exploit the additional degrees of freedom available in their design space. On the basis of these models, optimization strategies for minimizing energy/operation are proposed and their efficiency is demonstrated on DSP datapath circuits. Worst-case process and temperature corner analyses are conducted to study low-voltage manufacturability and noise immunity challenges in mixed swing circuits. On-chip low-voltage series regulation approaches are developed to efficiently offset intra-and inter-die threshold variations, offering improved low-voltage manufacturability than full-swing static CMOS, while preserving high noise immunity. Further, on-chip series regulation eliminates the necessity for additional explicit off-chip supplies, transforming mixed swing techniques into a self-contained methodology which can replace full-swing static CMOS operating between a regular, high-voltage supply without warranting any technology or system-level modifications. Experimental results showing substantial energy/operation savings are presented from (i) fabricated ICs and intensive circuit simulations on fixed-point DSP multi-plier-accumulators over a range of operand bit-widths, power supply voltages, and commercial 0.5µm-0.16µm bulk-CMOS and fully-depleted SOI processes, and, (ii) data buses and multicast datapath nets of the floating-point units …